litert-community/DIS-ISNet-LiteRT

DIS (IS-Net, general-use) — High-precision object cutout (LiteRT GPU)

On-device dichotomous image segmentation running fully on the LiteRT CompiledModel GPU delegate (no CPU fallback). DIS (ECCV 2022) is a high-accuracy IS-Net that cuts out the main object with fine structure detail (thin stems, petals, wires, handles) — for e-commerce product photos and graphics. ~11 ms/frame on a Pixel 8a.

• Architecture: IS-Net (RSU / U²-Net-style nested residual blocks) — pure CNN.
• Weights: xuebinqin/DIS isnet-general-use · Apache-2.0.
• Size: 176 MB.

Input (left) → high-precision alpha cut-out on transparency (right). Photo: Unsplash (free license).

I/O

• Input: [1, 3, 1024, 1024] NCHW, RGB, x/255 - 0.5.
• Output: [1, 1, 1024, 1024] sigmoid mask (0–1) — resize to the image, use as alpha.

GPU conversion

DIS is a pure CNN (IS-Net RSU blocks). It converts fully GPU-compatible (247/247 nodes on the delegate, 1 partition; device max|diff| 0.00034, ~11 ms) with one defensive patch: align_corners=True → False on the bilinear upsamples. CPU-exact vs PyTorch (max|diff| 0.0).

Minimal usage

Kotlin (Android, LiteRT CompiledModel GPU)

val options = CompiledModel.Options(Accelerator.GPU)
val model = CompiledModel.create(context.assets, "dis.tflite", options, null)
val inBufs = model.createInputBuffers()
val outBufs = model.createOutputBuffers()

inBufs[0].writeFloat(inputNCHW)          // [1,3,1024,1024] RGB, x/255 - 0.5
model.run(inBufs, outBufs)
val mask = outBufs[0].readFloat()        // [1024*1024] alpha (0..1); resize -> composite

Python (LiteRT / ai-edge-litert)

import numpy as np
from ai_edge_litert.interpreter import Interpreter

it = Interpreter(model_path="dis.tflite"); it.allocate_tensors()
inp, out = it.get_input_details(), it.get_output_details()
it.set_tensor(inp[0]["index"], x)        # [1,3,1024,1024] float32, RGB, x/255 - 0.5
it.invoke()
mask = it.get_tensor(out[0]["index"])[0, 0]   # [1024,1024] alpha 0..1

Conversion

Converted with litert-torch (build_dis.py): loads the Apache-2.0 IS-Net general-use weights and exports the main mask.

Performance

Measured on a Pixel 8a (Tensor G3, Android 16) with the standard TFLite benchmark_model tool — 10 warm-up runs then 50 timed runs, reported as the tool's mean.

Runtime	Backend	Graph on GPU	Latency
LiteRT CompiledModel (LITERT_CL)	GPU	247 / 247	~11 ms
TFLite benchmark_model (TfLiteGpuDelegateV2)	GPU (OpenCL)	247 / 247	240.5 ms
TFLite benchmark_model	CPU (XNNPACK, 4 threads)	—	4868.4 ms

The two GPU rows are different runtimes, not a contradiction. The LITERT_CL figure is the one recorded when this model shipped, taken through LiteRT's own CompiledModel accelerator — the path the Kotlin sample app and the LiteRT API use. The TfLiteGpuDelegateV2 figure is the classic TFLite OpenCL delegate, measured with a tool anyone can download and re-run. They agree on how much of the graph the GPU takes; they disagree on speed, and the classic delegate is the slower of the two here. Read the TfLiteGpuDelegateV2 row as a reproducible floor, not as this model's speed on LiteRT.

Snapdragon NPU (Hexagon)

The NPU is 2.99x faster than the GPU (24.21 ms against 72.43 ms) and loads 6.58x faster (192 ms against 1264 ms).

backend	inference (median / min)	load
NPU (Hexagon v81)	24.21 ms / 23.96 ms	192 ms
GPU (Adreno)	72.43 ms / 71.86 ms	1264 ms

Measured on a Samsung Galaxy S26 (Snapdragon 8 Elite Gen 5 / SM8850, Hexagon v81, Android 16), LiteRT CompiledModel 2.2.0, one accelerator per process, 5 warm-up runs then N=50 timed runs, median reported. Every run held thermal status NONE throughout. Headroom 0.69-0.71, where 1.0 is the throttling threshold.

The NPU rows here ran artifacts compiled ahead of time for SM8850 with QAIRT 2.47.0; the GPU rows ran the published files as they are. LiteRT can also compile for the NPU on the device at first load, which is what lets you ship the published file unchanged — that path and the ten runtime libraries it needs are in the NPU recipe, and we did not measure it here. GPU wiring is in the GPU recipe.

License

Apache-2.0 (DIS / xuebinqin). IS-Net architecture.